Compaan Design: C-to-Dataflow Compiler

Compaan Design provides innovative tools and services for accelerating the design of compute-intensive applications. C-code is accelerated and integrated on specialized high-performance stream-based compute systems (e.g., FPGAs from Xilinx and Altera). Compaan Design delivers its customers a complete solution that differences in performance, quality, and time-to-market. This is realized through a unique and innovative C-to-Dataflow approach that has been developed over many years in European high-tech R&D programs.

animation

Whether accelerating a small design for an SME or designing a multi-FPGA system for a large corporation, Compaan Design has proven to be a reliable technological partner for achieving high performance qualitative results.

About Compaan Design

Compaan Design is a spin-out from University Leiden, Institute of Advanced Computer Science (LIACS). The technology of Compaan Design is the result of many years of focused research at Leiden University and European R&D programs.

Auto Parallelism
Modern FPGAs provide enormous amounts of exploitable parallels that will only increase in time. Compaan's C-to-Dataflow compiler provides a unique flow to automatically exploit the parallelism present in C-code using advanced Dataflow.
C-to-Dataflow Compiler
Compaan's unique C-to-Dataflow compiler leads to dataflow design on FPGAs that are low-latency, real-time and low power. The obtained designs are perfect for processing large amounts of data in real-time.
C-style Programming flow for FPGAs
The biggest problems with FPGAs is the programming flow is different from Software. Compaan provides a flow enabling a software programmer to program a one or more FPGAs system like software. The compiler allows you to design complex FPGAs in Hours instead of Weeks.
System Level integration
Running a design on an FPGA requires a programmed FPGA, an interaction with the outside world and control to change parameters, processing options or view results. Compaan provides a single integrated view of control flow and dataflow.
Build on Open Standards
Compaan uses open standards like ISO-C and IEEE 1685 (IP-XACT) to define and describe its designs obtained from C code. Designs integrate easily with Xilinx (Vivado™) and Altera (Quartus™) design flows.
Seamless with High Level Synthesis
Compaan allows for seamless integration of hand designed IP Cores or IP Cores generated with High-level Synthesis from EDA Vendor like Xilinx Vivado-HSL™ or Catapult ™ High-Level Synthesis to realize (floating-point) functionality in designs.

Our Portfolio

A number of cases where Compaan was used.

Medical Imaging

Computed Tomography (CT)

Compaan helped a client to develop hardware implementations of advanced image filters used in CT-scanners. Compaan has shown a reduction in development time from months to weeks, providing better proof that the designs are without errors, and showed that designs can scale with the continuous upgrade of FPGA technology.

Computed Tomography (CT)

Compaan helped a client to accelerate a Matlab application improving the image quality for CT-scanners from 5 minutes execution time to 0.1 second. This acceleration lead to process 3D images in real time instead of taking 30 hours when running in Matlab.

Magnetic Resonance Imaging (MRI)

Compaan helped a client to develop a complete 2D full image FFT/IFFT filter bank which is at the core of medical MRI applications on a high-end FPGA. The application was developed and tested in C-code and mapped on a FPGA using vendor specific IP cores.

Video Processing

Compaan developed a setup for real-time processing of HD images on a FPGA including the development of a control GUI.

Telecommunications

Compaan helped a client to accelerate a Software Defined Radio (SDR) application in the communications domain 6333 times using 4 high-end FPGAs. Instead of months of development time, Compaan run the application in less than one month. In this design, IP core generated with Mentor Graphics CatapultC© compiler technology were seamlessly integrated.

Financial Service Industry

Compaan helped a client in the financial service industry to make a high-throughput low-latency hardware design from C-code.

Nondestructive testing (NDT)

Compaan helped a client to upgrade their current NDT product. A new design was realized in 4 months with Compaan while the same design was already under development for 2 years using conventional hardware development approach. The Compaan design was more robust, easier to scale with requirements, and required less power.

Our skills

Compaan Design provides the following services:

  • Acceleration of applications on FPGA architectures
  • Support for Xilinx (ISE/Vivado) and Altera (Quartus-II) design flows
  • Consultancy on FPGA technology, design flows, communication structures
  • Rewrite your C-code to programs the Compaan technology can process
  • Integration of your existing IPs in new designs

Feel free to contact us

Compaan Design BV
Galileiweg 8
2333 BD Leiden
The Netherlands
Tel: +31 71 302 0012
Chamber of Commerce: Leiden 57563659
VAT registration number: NL 8526.34.304 B01

© 2015 Compaan Design BV. All Rights Reserved.